Fundamentals of CPLD/FPGA System Design with Verilog/VHDL Language St.Hua Private School

    تفاصيل الدورة

    This course is targeted for those who begin to learn complex programmable logic device (CPLD) or Field Programmable Gate Array (FPGA). The course is based on Verilog language. Students will learn how to use Verilog library, how to build entities and architectures and how to debug after completing a program. This course combines both theoretical lecture and hand-on practices on study board (based on Altera MAXII EPM240T100C5 chip).

    Content:

    • Concept of CPLD and FPGA.
    • Verilog HDL guide.
    • Use Quartus II software developing platform
    • Timing Analyzer
    • Simulation
    • Introduction to ModelSim
    • Peripheral circuit design analysis
    • Experiment and design project
    تحديث بتاريخ 27 February, 2018

    نبذة عن معهد St.Hua Private School

    The teachers at St. Hua Private School are well trained and experienced, where majority hold at least a master degree from either local or overseas universities. Most of our courses are subsidized by SDF (Skill Development Fund) and SRP (Skill Redevelopment Fund). It is our responsibility to ensure that every student master the relevant knowledge with ease and fun. Ultimately, we aim to ensure that all our students are better equipped with the necessary skill sets to meet the requirements of the society, to prepare them for the workforce and to enhance the current skill set of workers such that they can better fit their current job.

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