Embedded System Design with Xilinx Zynq FPGA and VIVADO

Course details

Note: Course Price will increase to $185 at the End of Dec,2017. While, Course is updated with HLS Design Lab & Debugging. We will Add/Update Course Content on regular basis & feedback.

Embedded System Design with Xilinx VIVADO Design Suit and Zynq FPGA is targeted for Hardware (FPGA) Design and Embedded enthusiast who want to upgrade and enhance their hardware(FPGA) Design Skills with State of Art Design Tools and FPGA from Xilinx. This course cover from Introduction to VIVADO, Intellectual Property (IP), IP Design Methodology, designing/implementing basic embedded system with Vivado and SDK, Creating custom AXI-4 Lite Led Controller IP, Programming Processing System (PS) of Zynq (i.e Zedboard) with Embedded Application projects from SDK , Utilizing Timer API and Debugging Features on SDK for Zynq PS, and Creating Boot Image of the Application Project for SD and QSPI flash of Zynq (ZedBoard).

Finally we have included the session on "Embedded Design with VIVADO HLS" this session includes the HLS Design Methodology, Synthesizing HLS C/C++ Project, Generating RTL/HDL from C/C++ and Exporting C/C++ project in to IP-XACT/ Pcore/Sys Gen Format.

So from this course you will able to get design/implementation skills of simple embedded system (Memory Test Application) to complex application design (utilizing Timer, Debugging etc.) and Create bootable Image file of the application project.For more details please watch the demo video and some Free video of course.